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K-MICRO (KAWASAKI MICROELECTRONICS) EXPANDS ITS ADVANCED SERDES TECHNOLOGY ASIC IP PORTFOLIO
Adds Fast-Lock CDR, 10Gbps SerDes with Adaptive Receive Equalization, and PCI Express Technology
SAN JOSE, Calif. – February 14, 2005 – K-micro (Kawasaki Microelectronics), a leader in advanced yet affordable ASICs, announced today that it has significantly expanded its ASIC intellectual property (IP) portfolio with the additions of fast-lock clock and data recovery (CDR) for fiber-to-the-premises (FTTP) applications, 10 Gbps SerDes with optional adaptive receive equalization technology for backplane applications, and PCI Express™ technology for networking, storage, and consumer applications.
“Most serial I/O standards emerging today are based on SerDes technology, and K-micro’s newest offerings enable our customers to adhere to these latest specifications,” said Sunil Baliga, vice president of marketing and business development for K-micro. “K-micro decided a few years ago to make SerDes a core competency for the company. We will continue to innovate in SerDes; for example, we plan to introduce 90nm SerDes later this year and will port our adaptive receive equalization technology to lower-rate SerDes.”
K-micro’s success with SerDes technology rests on a team of dozens of engineers led by Dr. Vijay Pathak. The company’s SerDes offerings now span from 0.18µm to 0.13µm and from 155 Mbps to 10 Gbps, enabling flexible solutions in long haul, metro and access networks.
FAST-LOCK CDR TECHNOLOGY
K-micro’s new fast-lock CDR technology for fiber-to-the-premises applications, including GPON, EPON,
and BPON and APON. This technology recovers the clock from incoming data bursts in less than 8 bits for all
data rates ranging from 155 Mb/s to 1.25 Gb/s . It also allows multi-rate operation to cover BPON, GPON and
EPON standards with a single transceiver.
“Our fast-lock CDR technology has two main benefits for customers, namely programmability for different data rates and flexibility of use at either end of a PON link,” said Dr. Vijay Pathak, vice president of strategic product development for K-micro.
The new fast-lock CDR features:
- Low jitter, providing more jitter budget for the optical components in the
system
- Modular I/O, enabling seamless interface with a variety of optical components in ac or dc coupled
modes
- Fast lock in a fraction of the lock time specified in the different PON specifications, delivering higher upstream bandwidth.
10 GBPS SERDES
K-micro’s new10 Gbps SerDes with adaptive receive equalization technology for backplane applications
automatically compensates for temperature changes, process variations, PCB material, and variations in signal
swings. Designed for 0.13µm, the SerDes is based on LC VCO technology to achieve low transmit jitter.
It features both user programmable receive equalization and state-of-the-art adaptive receive equalization,
which automatically compensates for signal losses in long backplanes. Adaptive receive equalization is achieved
by having a controlled feedback that provides appropriate boost to the attenuated signal. The technology has
been successfully demonstrated to recover 10 Gbps data from a completely closed eye after 30 inches of FR4
backplane at the expense of less than 0.1 UI pk-pk jitter at the equalizer output.
“The main benefit to customers from our 10 Gbps SerDes with adaptive receive equalization technology is flexibility in designing their systems,” said Dr. Vijay Pathak. “For example, our adaptive receive equalization technology will allow customers to use 10 Gbps transmission up to 30 inches of backplane with a less-expensive backplane material such as FR4 without having to adjust for receiver equalization. Another example is that customers may be able to drive 10 Gbps over existing backplanes designed for slower data rates, saving themselves the cost and effort of having to re-design their backplane.”
PCI EXPRESS ENDPOINT TECHNOLOGY
K-micro’s PCI Express endpoint technology consists of the physical layer (PHY), the link layer, and the
transaction layer. The new PCI Express technology has successfully passed the rigorous testing procedures
of the PCI-SIG’s Compliance Workshop and has been listed on the PCI Express Integrators List (at http://www.pcisig.com/developers/compliance_program/...).
PCI Express is a leading next generation of internal PC bus. Early access to this technology will enable K-micro customers to establish a market lead. The proven compliance with the specification and compatibility verification assure K-micro customers that they can quickly develop and market PCI Express products.
ABOUT K-MICRO (KAWASAKI MICROELECTRONICS)
K-micro is the leader in advanced yet affordable ASIC semiconductor technology solutions. The company’s
innovative core technologies and world-class design support are used in the consumer electronics, computer,
office-automation, and networking markets. The company is an active participant in industry standards organizations,
including the Wi-Fi Alliance, Network Processing Forum (NPF), Optical Internetworking Forum (OIF), PCI Special
Interest Group (PCI-SIG), USB Implementers Forum, MPEG Industry Forum (MPEGIF), Mobile Computing Promotion
Consortium (MCPC), the Digital Display Working Group (DDWG), SD Card Association (SDA) and OCP International
Partnership (OCP-IP). K-micro has design centers in Boston, San Jose, Taipei, and Tokyo. For more information,
contact the company at 408-570-0555, or visit http://www.k-micro.us/.
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Press Contact:
Sacha Arts
Slider & Associates
408-356-3099
sacha@sliderassociates.com